Registers
- MIPS has 32 general purpose registers
- In assemply, they can be referred to as their name: t1 etc. or their number 1
| Name | Number | Usage |
|---|---|---|
zero | 0 | Constant value 0 |
v0 - v1 | 2 - 3 | Values for results and expression evaluation |
a0 - a3 | 4 - 7 | Arguments |
t0 - t7 | 8 - 15 | Temporaries |
s0 - s7 | 16 -23 | Program Variables |
t8 - t9 | 24 - 25 | Temporaries |
gp | 28 | Global Pointer (dont modify) |
sp | 29 | Stack Pointer (dont modify) |
fp | 30 | Frame Pointer (dont modify) |
ra | 31 | Return Address (dont modify) |
at | 1 | Reserved: for assembler |
k0 - k1 | 26 - 27 | Reserved: for operating system |
MIPS Instruction
add $s0, $s1, $s2
add: operation$s0: destination register$s1: source register 1$s2: source register 2
Immediate Instruction
addi $s0, $s0, 5
- The constant (in this case
5) ranges from to because it is represented as 16-bit 2s complement
Memory
- Memory is a array of memory locations
- MIPS uses byte addresses, i.e. each memory address is 1 byte (8 bits)
- MIPS addresses are 32 bits long
- Byte addressable memory: each element in the array is 1 byte (8 bits) long
- Word addressable memory: each element in the array is 1 word (32 bits for mips) long
- Word alignment
- If a word data value is word aligned in memory, its address is a multiple of the word size
- Accessing
- Load word
lw $t0, 4($s0), Store wordsw $t0, 4($s0)$s0register contains the memory address to load from (base address)4is the offset from the address contained by$s0- for
lwandsw, base address + offset has to be multiple of 4
- Load byte, store byte
- Only loads and stores the lowest byte
- Load word
Control Flow
- Branch
beq $s0, $s1, Labelandbne $s0, $s1, Label - Greater or less than?
- Set on less than
slt $t0, $s1, $s2orslti: if$s1 < $s2then set$t0to1, else0 bne $t0, $zero, Label
- Set on less than
Code
| Code | MIPS |
|---|---|
f = g; | add $s0, $s1, $zero |
a = a * (2^n); | sll $s0, $s0, n |
a = a / (2^n) | srl $s0, $s0, n |
a = ~a (bitwise not) | nor $s0, $s0, $zero |
a = 0xAAAABBBB (32 bit) | lui $s0, 0xAAAA; ori $s0, 0xBBBB |